Description

Extending our international team, we are looking for an experienced Digital Design Engineer.

Racyics® is Europe’s leading design service provider for mixed-signal system-on-chip design and turnkey services in advanced nodes.

We deliver professional analog, digital and mixed-signal design services tailored to the customers’ needs with focus on realization of complex System-on-Chips in leading edge technology nodes. Our team of more than 100 employees covers the complete chip design process up to system architecture development. Racyics is working for major German and international semi-custom companies both as a service provider and in collaborative partnerships.

  • Define architecture of digital blocks according to customer specification for ASIC and FPGA Designs
  • Responsibility for RTL design (VHDL, Verilog) of digital blocks and their system level integration
  • Close cooperation with RTL2GDS flow experts to optimize digital blocks and support block implementation
  • Support and drive chip and block level functional verification
  • Implement and maintain regression setups for verification
  • Create verification plans and develop verification environments based on Unified Verification Methodology (UVM)
  • Support product qualification, testing and ramp-up
  • Develop methodology, implement flow and methodology enhancements
  • Actively support Project Management

  • Bachelor’s/Master’s Degree in Electrical Engineering or Information Technology or similar
  • At least 5+ years experience in digital design and verification
  • Strong knowledge of hardware description languages (VHDL or Verilog and SystemVerilog)
  • Experience in SoC design
  • Experience in some majors IPs and SoC protocols (e.g. AHB/APB, Arm Cortex M3)
  • Experience in developing verification methodologies and infrastructure for test benches
  • Experience in writing test cases in Verilog and C
  • Experience in scripting for design automation (e.g. Python/ Perl/ TCL)
  • Knowledge about synthesis constraints (SDC) and UPF
  • Understanding of UVM/OVM concepts and usage
  • Experience in functional verification and creating test concepts and verification environments
  • Self-driven and hands-on way of working
  • Strong analytical and solution-oriented thinking
  • Good written and oral communication skills in English
  • Team-player

Location:

Dresden, Germany Duisburg, Germany

Employment Type:

Full-time (up to 40 hours per week)

Working at Racyics comes with many benefits, including flexible working hours, mobile work, a financial contribution to your childcare costs and great team events.